1. Field of the Invention
The present invention relates to a tightly coupled multiprocessor system fabricated using a silicon wafer integral to a three dimensional assembly. More particularly, unpackaged integrated circuit devices, such as logic and memory chips are disposed on a wafer and connected to electronic devices therein to form a multifunctional module, which can be used to form a multiprocessor computer system.
2. Description of Related Art
Conventionally, multiprocessor systems utilize separate and distinct functional units, such as a multichip module with a substrate carrier for the processors, a memory adapter card, e.g. single in line memory module (SIMM), and a separate module for a switching element which allows the processors to communicate with the memory.
These discrete functional units each require a substantial amount of volume in a computer system and also present data transmission problems, since at least some of the interconnecting lines will be long, increasing time of flight of data to levels not commensurate with performance requirements of the machine. Alternatively, a processor placed on one side of a card, away from the memory unit, will have longer line lengths to a memory chip than those of a processor mounted near the memory. In order to prevent data timing skew associated with these variations in line length, all of the critical wiring paths in conventional systems are designed to be the same length. Thus, the line length is dependent on the length of the longest line and hence system performance suffers.
Multichip modules, which are known in the art, allow whole computer functions to be placed on a single module, which can in turn be attached to a computer planar, by a connector, or directly with solder ball connect (SBC) technologies, or the like. These multichip modules include integrated circuit devices on at least one side of a passive substrate carrier, such as a dielectric material having wiring layers therein. The wiring layers in the substrate only provide the electrical interconnection required between the various chips disposed on either side of the substrate. Thus, it can be seen that conventional multichip modules are a plurality of integrated circuit devices wired together through a supporting passive substrate.
Thus, it can be seen that a multifunctional module in which the substrate layer, not only provides mechanical support and electrical interconnection for chips mounted thereon, but also provides an active functional layer would be highly desirable. This goal can be accomplished by using a silicon wafer including electronic components therein as the substrate carrier, and then mounting a plurality of integrated circuit devices on either side thereof.
It is known to use silicon wafers as substrate material, particularly to solve the problem of matching the thermal coefficient of expansion between the substrate and the chips. U.S. Pat. No. 5,039,628 describes a multichip module wherein a silicon material can be used as a carrier for integrated circuit devices. A preferred carrier material will have a thermal coefficient of expansion to match the mounted chips. It is also noted that vias are formed through the carrier material. U.S. Pat. No. 4,956,695 is a three dimensional chip package wherein plural ICs, having interconnection leads extending therefrom, are bonded with dielectric material. Ceramic spacers are placed intermediate of the leads and the ends of the spacers are then ground down to expose the interconnection leads. Ceramic spacers are used to match the thermal coefficient of expansion of the chips.
Other conventional systems use silicon as a carrier for integrated circuit devices and form vias in the silicon to allow connection through the carrier. For example, U.S. Pat. No. 3,787,252 is a semiconductor wafer having circuit elements formed on an epitaxial layer. Through connections are formed through the wafer to allow the circuit elements to contact interconnection points for conductors disposed on an adjacent insulating board. U.S. Pat. No. 5,024,966 discusses a silicon substrate used to mount a semiconductor optical device. An external modulated current source is then interconnected to the optical device. The silicon substrate includes a metallized via to allow connection of the optical device to a conducting layer disposed on the opposite side of the substrate. U.S. Pat. No. 5,063,177 describes packaging of monolithic microwave integrated circuits on a motherboard of high resistivity silicon. The silicon substrate acts as a transmission medium, chip carrier and heat conductor. Vias can be etched into the substrate to allow interconnection of the placed integrated circuits with a ground plane, or the like. Additionally, resistors, capacitors, and transmission lines can be integrated in the substrate, along with logic devices, such as microprocessors. The circuit elements are then mounted on a medium that can be diced to form individual integrated circuit devices. IBM Technical Disclosure Bulletin, volume 18, No. 10, March 1976, page 3478, shows a technique for bonding silicon substrates containing through holes. This technique is used in multiple chip (wafer) stacked packages.
It can be seen that none of the conventional systems use a multilayer silicon multichip module to form a multiprocessor functional element.